xCore vs. Xec7

Main differences between architectures

    The xCore architecture can regarded as an evolution of the already known Xec7 architecture. The operating principle has been maintained but many features have been added, both hardware and software, which raise even more the system security level.

    Instead, it is a enhanced and simplified development system that is now based on Microsoft Visual Studio 2017 and allows a complete simulation and emulation of the device allowing full debugging of the final application.

 Hardware featuresXec7 xCore
ARM7 TDMI @ 48 MHz
ARM CortexM4 168 MHz
    AES cryptographyc coprocessor    
    Hashing cryptographyc coprocessor
    True Random Number Generator TRNG certificato FIPS    
    USB Interface
USB Full-Speed 12 Mb/sec
USB High-Speed 480 Mb/sec
    Non volatile internal memory (EEPROM - Endurance > 4x106 write cycles)
    Overprinted tamperevident rubber shell
    Driverless device (HID)

(1) Configurable parameter

Onboard execution parametersXec7 xCore
    RAM space for code execution
48 KBytes
128 KBytes
    Input/Output Buffer    
2 KBytes
32 KBytes IN + 32 KBytes OUT
    Non-volatile memory (EEPROM)32 KBytes
    Global AES keys for code (application) decrypt    
    User specific AES keys for code (application) decrypt
2 per user

General featuresXec7xCore
    Multilicenses management (up to 10)
    Multi-instances on a single host    
    Integrated service for authentication (up to 4 users)
    Users authentication with RSA PSS (up to 2048 bits)    
    Users authentication with AES256
    Administrator User to manage the device
    Licenses can be assigned to specific user
    Modules assignement to the specific user    
    Runtime setting of AES Volatile Keys (128192256 bits
    The AES Volatile Keys can also be used by the internal code    
    Crypt/decrypt with Volatile Keys (ECB, CBC, GCM, IGE)
    Setting of Non Volatile KeysRSA 512102420484096 bits and AES 256
    Crypt/decrypt with Non Volatile Keys (also from internal code)

Timers & DateXec7xCore
    Total number of internal Timers
    Timer resolution 
1 minute
    Global Timers2
    User's Timer 
    Possibility to turn on the timer with the opening of any session
    Possibility to turn on the timer with the user-specific session opening
    Managing the expiration date of the licenses (xCoreNET only)
    Managing the expiration date of the single user (xCoreNET only)
    Managing the Expiration date of the single module (xCoreNET only)

Mass Storage (xCoreSD only)Xec7xCore
    MassStorage up to 128 GBytes
    Mass Storage partitioning into 3 logic units    
    Mount and unmount command for the second logit unit
    AES 256 Harware Encryption of all data on the disks    
    AES keys generated internally and not exportable
    Encryption tied to the S/N and internal memory
    Phantom Disk accessible only from the internal code (application)
    Internal File System for the Phantom Disk

Development SystemXec7xCore
Microsoft Visual Studio 2017
    Onboard- Code simulation & debug
Complete and integrated into VS
    ARM GCC compiler: free ed open source (C e C++Integrated in Visual Studio
    Internal API for internal code (application)
    External APIs (dll and obj) for communicating and managing the device in Windows
    Tools for project management and configuration
    Tools for devices managing and configuring


Differences in operation

    The following images show schematically how the two architectures work. It can be easily noticed that, apart from opening an authenticated session, xCore's operation replicates fairly accurately that of Xec7.

 Xec7 operation diagram

 xCore operation diagram